Book: Genetic Algorithms for VLSI Design, Layout and Test AutomationAuthor/s: Pinaki Mazumder and Elizabeth M. Rudnick
ISBN: 0-13-011566-5
Pages: 336
Book: Genetic Algorithms for VLSI Design, Layout and Test Automation
Author/s: Pinaki Mazumder and Elizabeth M. Rudnick
ISBN: 0-13-011566-5
Pages: 336
Genetic Algorithms for VLSI Design, Layout and Test Automation was written for practicing design engineers and individuals researching computer aided design (CAD) and very large-scale integration (VLSI). This already tells us that this book is not for the faint-hearted. It is a highly technical book with a strong mathematical, statistical academic base.
Both the authors are highly established academics, and the testing focus is on embedded software and electronics.
Generation of VLSI layouts, optimisation of VLSI design, and chip testing tasks can be accomplished by using genetic algorithms (GAs) to develop the required CAD tools.. Genetic Algorithms for VLSI Design, Layout and Test Automation discusses these tasks, associated problems and possible solutions in detail.
The above problems belong to the NP-complete (non-deterministic polynomial-time complete) and NP-hard (non-deterministic polynomial-time hard) class of decision problems. Those who study – or have studied – the field of mathematics or operational research will be familiar with these types of problems, and will realise that there is some problem in practically solving them.
Chapter 1 introduces the simple genetic algorithm and the steady-state algorithm, terminology and genetic operators, and using GAs to solve VLSI layout, design and automated testing problems. The functioning of a genetic algorithm is demonstrated using a basic example.
Chapter 2 reviews earlier methods for solving circuit partitioning problems, and then provides a detailed description for solving this problem with a steady-state GA, as well as a hybrid GA including local optimisation. Chapter 3 describes a GA for standard cell placement and presents the results. The genetic approach for standard cell placement is compared to simulated annealing. A combined approach for macro cell placement is discussed.
Chapter 4 discusses earlier methods for addressing macro cell routing problems and presents GA solution to this problem. The Steiner tree problem is discussed. The effectiveness of applying a GA for the Steiner tree problem as applied to macro cell routing is also looked at.
Chapter 5 describes a GA for field programmable gate arrays (FPGA) technology mapping and reviews experimental results.
Chapter 6 puts forward a GA framework for automatic test generation. Deterministic/genetic test generator hybrids are reviewed, as well as finite state machine sequences and dynamic test sequence compaction.
Chapter 7, Peak Power Estimation, presents the methods of power estimation for circuits and describes a GA for estimating the peak power dissipation. The accuracy of this method compared to earlier methods is demonstrated.
Chapter 8 investigates parallel implementations of GAs for standard cell placement and test generation.
Chapter 9, the conclusion, tells readers how they could develop a GA to solve new problems (in VLSA or another area of engineering/science). Genetic algorithms are compared to more conventional algorithms.
Although the practical implementation might not be in line with today’s optimised practices, if you are working in the field of chipset design or CAD engineering you will find this book interesting. You might find the book an academic idea generator that still needs a lot of time in the sandbox before showing real practical implementation value beyond the methods utilised today.